Difference between revisions of "DataflowBibliography"
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*Grafe, V.G., G.S. Davidson, J.E. Hoch, and V.P. Holmes. "The Epsilon Dataflow Processor." In the Proceedings of the 16th Annual International Symposium on Computer Architecture (ISCA), 1989. http://doi.acm.org/10.1145/74925.74930 | *Grafe, V.G., G.S. Davidson, J.E. Hoch, and V.P. Holmes. "The Epsilon Dataflow Processor." In the Proceedings of the 16th Annual International Symposium on Computer Architecture (ISCA), 1989. http://doi.acm.org/10.1145/74925.74930 | ||
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| + | Nikhil, R.S. "Can dataflow subsume von Neumann computing?" In the Proceedings of the 16th Annual International Symposium on Computer Architecture (ISCA), 1989. http://doi.acm.org/10.1145/74925.74955 | ||
| + | : This paper describes the P-RISC architecture, which adds dataflow features to RISC-style multiprocessors. The features come from the addition of fine grain threading and synchronization operations at the ISA level. | ||
*Sakai, S., Y. Yamaguchi, K. Hiraki, Y. Kodama and T. Yuba. "An architecture of a dataflow single chip processor." In the Proceedings of the 16th Annual International Symposium on Computer Architecture (ISCA), 1989. http://doi.acm.org/10.1145/74925.74931 | *Sakai, S., Y. Yamaguchi, K. Hiraki, Y. Kodama and T. Yuba. "An architecture of a dataflow single chip processor." In the Proceedings of the 16th Annual International Symposium on Computer Architecture (ISCA), 1989. http://doi.acm.org/10.1145/74925.74931 | ||
: ''Description of the EM-4, a follow-on to the Sigma-1. EM-4 was to be a first dataflow multiprocessor in which every processing node occupied no more than a single chip. Describes a ''strongly connected arc'' model, which is broadly similar to the Monsoon frame model and its ilk. Discusses shortcomings of prior dataflow machines. Attempts to address these in the new architecture.'' <br>[[User:Schwerin|Schwerin]] 13:45, 5 January 2006 (PST) | : ''Description of the EM-4, a follow-on to the Sigma-1. EM-4 was to be a first dataflow multiprocessor in which every processing node occupied no more than a single chip. Describes a ''strongly connected arc'' model, which is broadly similar to the Monsoon frame model and its ilk. Discusses shortcomings of prior dataflow machines. Attempts to address these in the new architecture.'' <br>[[User:Schwerin|Schwerin]] 13:45, 5 January 2006 (PST) | ||
| + | *Papadopoulos, Gregory M., and Kenneth R. Traub. "Multithreading: a revisionist view of dataflow architectures." In the Proceedings of the 18th Annual International Symposium on Computer Architecture (ISCA), 1991. http://doi.acm.org/10.1145/115952.115986 | ||
| + | : This paper looks at the Monsoon dataflow architecture as a multithreaded computer with fine-grain threads. | ||
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| + | == Refereed Journal Papers == | ||
*Arvind and Nikhil, V.C. "Executing a program on the MIT tagged-token dataflow architecture." In IEEE Transactions on Computers, March, 1990. http://doi.ieeecomputersociety.org/10.1109/12.48862 | *Arvind and Nikhil, V.C. "Executing a program on the MIT tagged-token dataflow architecture." In IEEE Transactions on Computers, March, 1990. http://doi.ieeecomputersociety.org/10.1109/12.48862 | ||
Revision as of 22:17, 9 January 2006
Conference Papers
- Dennis, Jack B. and David P. Misunas. "A preliminary architecture for a basic dataflow processor." In the Proceedings of the 2nd Annual Symposium on Computer Architecture (ISCA), 1975. http://doi.acm.org/10.1145/642089.642111
- Description of static dataflow and an architecture for executing programs composed of static dataflow graphs. This is a very early paper on the topic of dataflow architectures, if not the earliest. The first few pages provide a reasonable introduction to the fundamentals of dataflow computation, though they are limited (I believe) to static dataflow models. The architecture described foreshadows that of many future dataflow machines, and the instruction caching problem that became the matching table overflow problem of later machines is discussed (or at least mentioned).
Schwerin 13:25, 5 January 2006 (PST)
- Grafe, V.G., G.S. Davidson, J.E. Hoch, and V.P. Holmes. "The Epsilon Dataflow Processor." In the Proceedings of the 16th Annual International Symposium on Computer Architecture (ISCA), 1989. http://doi.acm.org/10.1145/74925.74930
Nikhil, R.S. "Can dataflow subsume von Neumann computing?" In the Proceedings of the 16th Annual International Symposium on Computer Architecture (ISCA), 1989. http://doi.acm.org/10.1145/74925.74955
- This paper describes the P-RISC architecture, which adds dataflow features to RISC-style multiprocessors. The features come from the addition of fine grain threading and synchronization operations at the ISA level.
- Sakai, S., Y. Yamaguchi, K. Hiraki, Y. Kodama and T. Yuba. "An architecture of a dataflow single chip processor." In the Proceedings of the 16th Annual International Symposium on Computer Architecture (ISCA), 1989. http://doi.acm.org/10.1145/74925.74931
- Description of the EM-4, a follow-on to the Sigma-1. EM-4 was to be a first dataflow multiprocessor in which every processing node occupied no more than a single chip. Describes a strongly connected arc model, which is broadly similar to the Monsoon frame model and its ilk. Discusses shortcomings of prior dataflow machines. Attempts to address these in the new architecture.
Schwerin 13:45, 5 January 2006 (PST)
- Papadopoulos, Gregory M., and Kenneth R. Traub. "Multithreading: a revisionist view of dataflow architectures." In the Proceedings of the 18th Annual International Symposium on Computer Architecture (ISCA), 1991. http://doi.acm.org/10.1145/115952.115986
- This paper looks at the Monsoon dataflow architecture as a multithreaded computer with fine-grain threads.
Refereed Journal Papers
- Arvind and Nikhil, V.C. "Executing a program on the MIT tagged-token dataflow architecture." In IEEE Transactions on Computers, March, 1990. http://doi.ieeecomputersociety.org/10.1109/12.48862
